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| Campo DC | Valor | Lengua/Idioma |
|---|---|---|
| dc.provenance | Comisión de Investigaciones Científicas | - |
| dc.contributor | Jaquenod, Guillermo A. | - |
| dc.contributor | Villagarcía Wanza, Horacio Alfredo | - |
| dc.contributor | De Giusti, Marisa Raquel | - |
| dc.creator | Jaquenod, Guillermo A. | - |
| dc.creator | Villagarcía Wanza, Horacio Alfredo | - |
| dc.creator | De Giusti, Marisa Raquel | - |
| dc.date | 2001 | - |
| dc.date.accessioned | 2019-04-29T16:00:51Z | - |
| dc.date.available | 2019-04-29T16:00:51Z | - |
| dc.date.issued | 2001 | - |
| dc.identifier | http://digital.cic.gba.gob.ar/handle/11746/1546 | - |
| dc.identifier | Documento Completo | - |
| dc.identifier.uri | http://rodna.bn.gov.ar:8080/jspui/handle/bnmm/306931 | - |
| dc.description | Standard microprocessors are generally designed to deal efficiently with different types of tasks; their general purpose architecture can lead to misuse of resources, creating a large gap between the computational efficiency of microprocessors and custom silicon. The ever increasing complexity of Field Programmable Logic devices is driving the industry to look for innovative System on a Chip solutions; using programmable logic, the whole design can be tuned to the application requirements. In this paper, under the acronym MPOC (Multiprocessors On a Chip) we propose some applicable ideas on multiprocessing embedded configurable architectures, targeting System on a Programmable Chip (SOPC) cost-effective designs. Using heterogeneous medium or low performance soft-core processors instead of a single high performance processor, and some standardized communication schemes to link these multiple processors, the “best” core can be chosen for each subtask using a computational efficiency criteria, and therefore improving silicon usage. System-level design is also considered: models of tasks and links, parameterized soft-core processors, and the use of a standard HDL for system description can lead to automatic generation of the final design. | - |
| dc.format | application/pdf | - |
| dc.format | 6 p. | - |
| dc.language | eng | - |
| dc.rights | info:eu-repo/semantics/openAccess | - |
| dc.rights | Attribution 4.0 International (BY 4.0) | - |
| dc.source | reponame:CIC Digital (CICBA) | - |
| dc.source | instname:Comisión de Investigaciones Científicas de la Provincia de Buenos Aires | - |
| dc.source | instacron:CICBA | - |
| dc.source.uri | http://digital.cic.gba.gob.ar/handle/11746/1546 | - |
| dc.source.uri | Documento Completo | - |
| dc.subject | Ciencias de la Computación | - |
| dc.title | Towards a field configurable non-homogeneous multiprocessors architecture | - |
| dc.type | info:eu-repo/semantics/conferenceObject | - |
| dc.type | info:eu-repo/semantics/publishedVersion | - |
| dc.type | info:ar-repo/semantics/documentoDeConferencia | - |
| Aparece en las colecciones: | Comisión de Investigaciones Científicas de la Prov. de Buenos Aires | |
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